EP1C4

Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C4

1. Enhanced Configuration Devices (EPC4, EPC8, and EPC16) Data Sheet

TheAlteraenhancedconfigurationdeviceisasingle-device,high-speed,advancedconfigurationsolutionforveryhigh-densityFPGAs.Thecoreofanenhancedconfigurationdeviceisdividedintotwomajorblocks,aconfigurationcontrollerandaflashmemory.Theflashmemoryisusedtostoreconf

EP1C4

Cyclone FPGA Family

EP1C4

Package Information Datasheet for Mature Altera Devices

EP1C4

This datasheet describes enhanced configuration (EPC) devices

EP1C4

Cyclone Device Handbook, Volume 1

EP1C4

Package Information Datasheet for Mature Altera Devices

EP1C4

Enhanced Configuration (EPC) Devices Datasheet

EP1C4F100C6ES

Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)

EP1C4F100C7ES

Cyclone FPGA Family Data Sheet

Introduction TheCyclone®fieldprogrammablegatearrayfamilyisbasedona1.5-V,0.13-μm,all-layercopperSRAMprocess,withdensitiesupto20,060logicelements(LEs)andupto288KbitsofRAM.Withfeatureslikephase-lockedloops(PLLs)forclockingandadedicateddoubledatarate(DDR)