EM78F811N数据手册Elan中文资料规格书

描述 Description

The EM78F811N is an 8-bit microprocessor designed and developed with low-power, high-speed CMOS technology. It has an on-chip 1K x 13-bit Electrical Flash Memory, a 128 bytes in-system programmable EEPROM. With its enhanced Flash-ROM features, the EM78F811N provides a convenient way of developing and verifying user’s programs. Moreover, this Flash-ROM device offers the advantage of easy and effective program updates, using development and programming tools. Users can avail of the ELAN Writer to easily program their development codes.

特性 Features

CPU Configuration
• 1K x 13 bits on-chip Flash memory
• 48 x 8 bits on-chip registers (SRAM)
• 128 bytes in-system programmable EEPROM whose Endurance is over 100,000 write/erase cycles
• More than 10 years data retention
• 8-level stacks for subroutine nesting
• Less than 1 mA at 5V/4MHz
• Typically 11 mA at 3V/32kHz
• Typically 1 µA during sleep mode

I/O Port Configuration
• 3 bidirectional I/O ports: P5, P6, and P8
• 14 I/O pins
• Wake-up port: P6
• High sink port: P6
• 6 programmable pull-high I/O pins
• 5 programmable pull-down I/O pins
• 6 programmable open-drain I/O pins
• External interrupt with Wake-up: P60

Operating Voltage Range
• 2.2V~5.5V at -40°C~85°C (Industrial Grade)

Operating Frequency Range
• High Internal RC oscillator (HIRC): 455kHz, 1MHz, 4MHz, 8MHz & 16MHz
• Low Internal RC oscillator (LIRC): 16KHz & 128KHz

Peripheral Configuration
• 8-bit real time clock only (TCC) with overflow interrupt
• Power down (Sleep) mode
• Three programmable Level Voltage Reset (LVR): 4.0V, 3.5V, 2.5V

31 Available Iinterrupts: (11 External, 20 Internal)
• External interrupt: EINT0, EINT1
• TM1, TM2, TM3,TM4 overflow interrupt
• TM5, TM6 period/duty match completion
• Input-port status changed interrupt
• ADC completion interrupt
• LVD interrupt
• Comparators 1~2 interrupt
• System hold interrupt
• PWM brake interrupt
• Hall edge interrupt

2/4/8/16 clocks per instruction cycle selected by code option

Programmable Free Running Watchdog Timer
• Watchdog Timer: 16.5ms±5% with VDD=5V at 25°C, Temperature range ±7.5% (-40°C~+125°C)
• Two clocks per instruction cycle

6+1 channels Analog-to-Digital Converter with 12-bit resolution
• Internal Vref: 2.048V/2.560V/3.072V/4.096V
• One of the channels is 1/2 VDD power detection

One set comparator with 4 to 1 CIN-
• Offset voltage: smaller than 2 mV

One 8-bit Timer/Counter
• TC3: Timer/Counter/PDO (Programmable Divider Output) /PWM (Pulse Width Modulation)

One 16-bit Timer/Counter
• TM1: Timer/Counter/PDO (Programmable Divider Output) /PWM/Window/Buzzer/Capture