丝印：EL4585CS；Package：16LdSOIC；Horizontal Genlock, 8FSC

The EL4585 is a PLL (Phase Lock Loop) sub-system, designed for video applications and also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS-compatible pixel clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

文件：742.97 Kbytes 页数：15 Pages

RENESAS

瑞萨

Horizontal Genlock, 8 FSC

General Description The EL4585C is a PLL (Phase Lock Loop) sub system, designed for video applications, but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan ra

文件：262.57 Kbytes 页数：16 Pages

ELANTEC

Horizontal Genlock, 8FSC

General Description The EL4585C is a PLL (Phase Lock Loop) sub system, designed for video applications, but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan ra

文件：271.74 Kbytes 页数：15 Pages

INTERSIL

丝印：EL4585CS；Package：16LdSOIC；Horizontal Genlock, 8FSC

The EL4585 is a PLL (Phase Lock Loop) sub-system, designed for video applications and also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS-compatible pixel clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

文件：742.97 Kbytes 页数：15 Pages

RENESAS

瑞萨

丝印：EL4585CS；Package：16LdSOIC；Horizontal Genlock, 8FSC

The EL4585 is a PLL (Phase Lock Loop) sub-system, designed for video applications and also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS-compatible pixel clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

文件：742.97 Kbytes 页数：15 Pages

RENESAS

瑞萨

Horizontal Genlock, 8FSC

General Description The EL4585C is a PLL (Phase Lock Loop) sub system, designed for video applications, but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan ra

文件：271.74 Kbytes 页数：15 Pages

INTERSIL

Horizontal Genlock, 8FSC

General Description The EL4585C is a PLL (Phase Lock Loop) sub system, designed for video applications, but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan ra

文件：271.74 Kbytes 页数：15 Pages

INTERSIL

Horizontal Genlock, 8FSC

General Description The EL4585C is a PLL (Phase Lock Loop) sub system, designed for video applications, but also suitable for general purpose use up to 36 MHz. In a video application this device generates a TTL/CMOS compatible Pixel Clock (Clk Out) which is a multiple of the TV Horizontal scan ra

文件：271.74 Kbytes 页数：15 Pages

INTERSIL

丝印：EL4585CSZ；Package：16LdSOIC；Horizontal Genlock, 8FSC

The EL4585 is a PLL (Phase Lock Loop) sub-system, designed for video applications and also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS-compatible pixel clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

文件：742.97 Kbytes 页数：15 Pages

RENESAS

瑞萨

丝印：EL4585CSZ；Package：16LdSOIC；Horizontal Genlock, 8FSC

The EL4585 is a PLL (Phase Lock Loop) sub-system, designed for video applications and also suitable for general purpose use up to 36MHz. In video applications, this device generates a TTL/CMOS-compatible pixel clock (CLK OUT) which is a multiple of the TV horizontal scan rate and phase locked to i

文件：742.97 Kbytes 页数：15 Pages

RENESAS

瑞萨