256Kx32 Synchronous Pipline Burst SRAM 3.3V

DESCRIPTION The EDI2DL32256VxxBC is a 3.3V, 256Kx32 Synchronous Pipeline Burst SRAM constructed with two 256Kx16 die mounted on a multi-layer laminate substrate. The device is packaged in a 119 lead, 14mm by 22mm, BGA. It is available with clock speeds of166, 150 and 133 MHz. The device is a Pipe

文件：97.94 Kbytes 页数：8 Pages

WEDC

256Kx32 Synchronous Pipline Burst SRAM 3.3V

DESCRIPTION The EDI2DL32256VxxBC is a 3.3V, 256Kx32 Synchronous Pipeline Burst SRAM constructed with two 256Kx16 die mounted on a multi-layer laminate substrate. The device is packaged in a 119 lead, 14mm by 22mm, BGA. It is available with clock speeds of166, 150 and 133 MHz. The device is a Pipe

文件：97.94 Kbytes 页数：8 Pages

WEDC

256Kx32 Synchronous Pipline Burst SRAM 3.3V

DESCRIPTION The EDI2DL32256VxxBC is a 3.3V, 256Kx32 Synchronous Pipeline Burst SRAM constructed with two 256Kx16 die mounted on a multi-layer laminate substrate. The device is packaged in a 119 lead, 14mm by 22mm, BGA. It is available with clock speeds of166, 150 and 133 MHz. The device is a Pipe

文件：97.94 Kbytes 页数：8 Pages

WEDC

256Kx32 Synchronous Pipline Burst SRAM 3.3V

DESCRIPTION The EDI2DL32256VxxBC is a 3.3V, 256Kx32 Synchronous Pipeline Burst SRAM constructed with two 256Kx16 die mounted on a multi-layer laminate substrate. The device is packaged in a 119 lead, 14mm by 22mm, BGA. It is available with clock speeds of166, 150 and 133 MHz. The device is a Pipe

文件：97.94 Kbytes 页数：8 Pages

WEDC

256Kx32 Synchronous Pipline Burst SRAM 3.3V

DESCRIPTION The EDI2DL32256VxxBC is a 3.3V, 256Kx32 Synchronous Pipeline Burst SRAM constructed with two 256Kx16 die mounted on a multi-layer laminate substrate. The device is packaged in a 119 lead, 14mm by 22mm, BGA. It is available with clock speeds of166, 150 and 133 MHz. The device is a Pipe

文件：97.94 Kbytes 页数：8 Pages

WEDC

256Kx32 Synchronous Pipline Burst SRAM 3.3V

Microchip

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