EBS52EC8APFA-7A中文资料美光科技数据手册PDF规格书

Description

The EBS52EC8APFA is 64M words × 72 bits, 2 banks Synchronous Dynamic RAM Unbuffered Module, mounted 18 pieces of 256M bits SDRAM sealed in TSOP package. This module provides high density and large quantities of memory in a small space without utilizing the surface mounting technology. Decoupling capacitors are mounted on power supply line for noise reduction.

Features

• Fully compatible with 8 bytes DIMM: JEDEC standard outline

• 168-pin socket type dual in line memory module (DIMM)

- PCB height: 34.93mm (1.38inch )

- Lead pitch: 1.27mm

• 3.3V power supply

• Clock frequency: 133MHz (max.)

• LVTTL interface

• Data bus width: × 72 ECC

• Single pulsed /RAS

• 4 Banks can operates simultaneously and independently

• Burst read/write operation and burst read/single write operation capability

• Programmable burst length (BL): 1, 2, 4, 8

• 2 variations of burst sequence

- Sequential

- Interleave

• Programmable /CAS latency (CL): 2, 3

• Byte control by DQMB

• Refresh cycles: 8192 refresh cycles/64ms

• 2 variations of refresh

- Auto refresh

- Self refresh