3P3T MIPI

EPiCMEMS

开元通信

8-bit latched/registered/pass-thru Futurebus universal interface transceiver

DESCRIPTION The FB2033 is an 8-bit transceiver featuring a split input (AI) and output (AO) bus on the TTL-level side. FEATURES • 8-bit transceivers • Latched, registered or straight through in either A to B or B to A path • Drives heavily loaded backplanes with equivalent load impedances dow

文件：173.28 Kbytes 页数：10 Pages

PHI

PHI

8-bit latched/registered/pass-thru Futurebus universal interface transceiver

DESCRIPTION The FB2033 is an 8-bit transceiver featuring a split input (AI) and output (AO) bus on the TTL-level side. FEATURES • 8-bit transceivers • Latched, registered or straight through in either A to B or B to A path • Drives heavily loaded backplanes with equivalent load impedances dow

文件：173.28 Kbytes 页数：10 Pages

PHI

PHI

Integrated Circuit Non-Inverting Transistor Array, Low Input Active

Description: The NTE2033 is a non–inverting transistor array, which is comprised of four NPN darlington output stages and PNP input stages. This device is low level input active driver and is suitable for operation with TTL, 5V C–MOS and 5V Microprocessor which have sink current output drivers.

文件：22.03 Kbytes 页数：2 Pages

NTE