| 零件编号 | 下载 订购 | 功能描述/丝印 | 制造商 上传企业 | LOGO |
|---|---|---|---|---|
DV74AC112 | Dual JK Negative edge-triggered flip-flop DualJKNegativeEdge-TriggeredFlip-Flop | AVG AVG Semiconductors(HITEK) | AVG | |
DualJKNegativeEdge-TriggeredFlip-Flop Description TheHD74AC112/HD74ACT112featuresindividualJ,K,ClockandasynchronousSetandClearinputstoeachflip-flop.WhentheclockgoesHigh,theinputsareenabledanddatawillbeaccepted.ThelogicleveloftheJandKinputsmaychangewhentheclockisHighandthebistablewillp | HitachiHitachi Semiconductor 日立日立公司 | Hitachi | ||
DualJKNegativeEdge-TriggeredFlip-Flop Description TheHD74AC112/HD74ACT112featuresindividualJ,K,ClockandasynchronousSetandClearinputstoeachflipflop. WhentheclockgoesHigh,theinputsareenabledanddatawillbeaccepted.ThelogicleveloftheJandKinputs maychangewhentheclockisHighandthebistablewill | RENESASRenesas Technology Corp 瑞萨瑞萨科技有限公司 | RENESAS | ||
DualJKNegativeEdge-TriggeredFlip-Flop Description TheHD74AC112/HD74ACT112featuresindividualJ,K,ClockandasynchronousSetandClearinputstoeachflipflop. WhentheclockgoesHigh,theinputsareenabledanddatawillbeaccepted.ThelogicleveloftheJandKinputs maychangewhentheclockisHighandthebistablewill | RENESASRenesas Technology Corp 瑞萨瑞萨科技有限公司 | RENESAS | ||
DualJKNegativeEdge-TriggeredFlip-Flop Description TheHD74AC112/HD74ACT112featuresindividualJ,K,ClockandasynchronousSetandClearinputstoeachflipflop. WhentheclockgoesHigh,theinputsareenabledanddatawillbeaccepted.ThelogicleveloftheJandKinputs maychangewhentheclockisHighandthebistablewill | RENESASRenesas Technology Corp 瑞萨瑞萨科技有限公司 | RENESAS | ||
DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS TheIN74AC112isidenticalinpinouttotheLS/ALS112,HC/HCT112.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLS/ALSoutputs.Eachflip-flopisnegative-edgeclockedandhasactive-lowasynchronousSetandResetinputs. •Output | IKSEMICON IK Semicon Co., Ltd | IKSEMICON | ||
DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS TheIN74AC112isidenticalinpinouttotheLS/ALS112,HC/HCT112.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLS/ALSoutputs.Eachflip-flopisnegative-edgeclockedandhasactive-lowasynchronousSetandResetinputs. •Output | INTEGRAL Integral Corp. | INTEGRAL | ||
DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS TheIN74AC112isidenticalinpinouttotheLS/ALS112,HC/HCT112.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLS/ALSoutputs.Eachflip-flopisnegative-edgeclockedandhasactive-lowasynchronousSetandResetinputs. •Output | INTEGRAL Integral Corp. | INTEGRAL | ||
DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS TheIN74AC112isidenticalinpinouttotheLS/ALS112,HC/HCT112.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLS/ALSoutputs.Eachflip-flopisnegative-edgeclockedandhasactive-lowasynchronousSetandResetinputs. •Output | IKSEMICON IK Semicon Co., Ltd | IKSEMICON | ||
DualJ-KFlip-FlopwithSetandResetHigh-SpeedSilicon-GateCMOS TheIN74AC112isidenticalinpinouttotheLS/ALS112,HC/HCT112.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLS/ALSoutputs.Eachflip-flopisnegative-edgeclockedandhasactive-lowasynchronousSetandResetinputs. •Output | IKSEMICON IK Semicon Co., Ltd | IKSEMICON |
详细参数
- 型号：
DV74AC112
- 制造商：
AVG
- 制造商全称：
AVG
- 功能描述：
Dual JK Negative edge-triggered flip-flop
| 供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
NS |
25+ |
SOP14 |
4500 |
全新原装、诚信经营、公司现货销售 |
询价 | ||
DV |
1822+ |
SOP |
9852 |
只做原装正品假一赔十为客户做到零风险!! |
询价 | ||
23+ |
65480 |
询价 | |||||
DV |
23+ |
SOP |
50000 |
全新原装正品现货,支持订货 |
询价 | ||
DV |
23+ |
SOP |
10000 |
原厂授权一级代理,专业海外优势订货,价格优势、品种 |
询价 | ||
DV |
24+ |
NA/ |
321 |
优势代理渠道,原装正品,可全系列订货开增值税票 |
询价 | ||
DV |
24+ |
SOP |
990000 |
明嘉莱只做原装正品现货 |
询价 | ||
DV |
25+ |
SOP |
321 |
原装正品,假一罚十! |
询价 | ||
DV |
25+ |
SOP |
321 |
原装正品,假一罚十! |
询价 | ||
DDI |
9314+ |
DIP-20 |
100 |
原装 |
询价 |
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