DSPIC33CK256MC106中文资料微芯科技数据手册PDF规格书

Advanced Analog Features

• High-Speed ADC module:

– 12-bit with one shared SAR ADC core

– Configurable resolution (up to 12-bit)

– Up to 3.5 Msps conversion rate per channel at 12-bit resolution

– Up to 20 input channels

– Dedicated result buffer for each analog channel

– Flexible and independent ADC trigger sources

– Four digital comparators

– Four oversampling filters for increased resolution

• Two Analog Comparators:

– 15 ns analog comparator

• Up to Three Op Amps:

– 20 MHz GBW

– 40 v/μs slew rate

– ±1 mV offset voltage (typical)

• Two 12-Bit DACs:

– Hardware slope compensation

– One buffered DAC output

Peripheral Features

• One Quadrature Encoder Interface (QEI):

– Four inputs: Phase A, Phase B, Home, Index

– One 32-bit timer/counter (in QEI module, available if encoder is not used)

• Small Pin Count Packages Ranging from 28 to 64 Pins, Including UQFN as Small as 4x4 mm

• High-Current I/O Sink/Source

• Edge or Level Change Notification Interrupt on I/O Pins

• Peripheral Pin Select (PPS) Remappable Pins

• Current Bias Generators

Safety Features

• Backup Fast RC Oscillator (BFRC)

• Brown-out Reset (BOR)

• Capless Internal Voltage Regulator

• Clock Monitor System with Backup Oscillator

• CodeGuard™ Security

• Cyclic Redundancy Check (CRC)

• Dual Watchdog Timer (WDT)

• Fail-Safe Clock Monitoring (FSCM)

• Flash Error Correcting Code (ECC)

• Flash OTP by ICSP™ Write Inhibit

• RAM Memory Built-In Self-Test (MBIST)

• Two-Speed Start-up

• Virtual Pins for Redundancy and Monitoring

• Windowed Deadman Timer (DMT)