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DSP56374PB规格书详情
Overview
The DSP56374 is a high density CMOS device with 3.3 V inputs and outputs.
The DSP56374 supports digital audio applications requiring sound field processing, acoustic equalization, and other digital audio algorithms. The DSP56374 uses the high performance, single-clock-per-cycle DSP56300 core family of programmable CMOS digital signal processors (DSPs) combined with the audio signal processing capability of the Freescale Semiconductor, Inc. (formerly Motorola) Symphony™ DSP family, as shown in Figure 1.
Features
1.1 DSP56300 Modular Chassis
• 150 Million Instructions Per Second (MIPS) with a 150 MHz clock at an internal logic supply (QVDDL) of 1.25 V.
• Object Code Compatible with the 56K core.
• Data ALU with a 24 x 24 bit multiplier-accumulator and a 56-bit barrel shifter;16 bit arithmatic support.
• Program Control with position independent code support.
• Six-channel DMA controller.
• Provides a wide range of frequency multiplications (1 to 255), predivider factors (1 to 31), PLL feedback multiplier (2 or 4), Output divide factor (1, 2 or 4) and a power-saving clock divider (2i: i = 0 to 7) to reduce clock noise
• Internal address tracing support and OnCE for Hardware/Software debugging.
• JTAG port, supporting boundary scan, compliant to IEEE 1149.1.
• Very low-power CMOS design, fully static design with operating frequencies down to DC.
• STOP and WAIT low-power standby modes.
1.2 On-chip Memory Configuration
• 6Kx24 Bit Y-Data RAM and 4Kx24 Bit Y-Data ROM.
• 6Kx24 Bit X-Data RAM and 4Kx24 Bit X-Data ROM.
• 20Kx24 Bit Program and Bootstrap ROM including a PROM patching mechanism.
• 6Kx24 Bit Program RAM.
• Various memory switches are available. See memory table below.
1.3 Peripheral modules
• Enhanced Serial Audio Interface (ESAI): up to 4 receiver pins and up to 6 transmitter pins, master or slave. I2S, Sony, AC97, network and other programmable protocols.
• Enhanced Serial Audio Interface I (ESAI_1): up to 4 receiver pins and up to 6 transmitter pins, master or slave. I2S, Sony, AC97, network and other programmable protocols. Note: Available in the 80 pin package only
• Serial Host Interface (SHI): SPI and I2C protocols, 10-word receive FIFO, support for 8, 16 and 24-bit words. Three noise reduction filter modes.
• Triple Timer module (TEC).
• Most pins of unused peripherals may be programmed as GPIO pins. Up to 47 pins can be configured as GPIO on the 80 pin package and 20 pins on the 52 pin package.
• Hardware Watchdog Timer
产品属性
- 型号:
DSP56374PB
- 制造商:
MOTOROLA
- 制造商全称:
Motorola, Inc
- 功能描述:
high density CMOS device with 3.3 V inputs and outputs
供应商 | 型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
---|---|---|---|---|---|---|---|
MOTOROLA |
23+ |
QFP |
4865 |
中国航天工业部战略合作伙伴行业领导者 |
询价 | ||
MOT |
1995 |
44 |
原装正品长期供货,如假包赔包换 徐小姐13714450367 |
询价 | |||
FREESCAL |
21+ |
BULK BGA |
2 |
原装现货假一赔十 |
询价 | ||
MOROTOLA |
2138+ |
QFP |
8960 |
专营BGA,QFP原装现货,假一赔十 |
询价 | ||
1041+ |
30 |
原装现货海量库存欢迎咨询 |
询价 | ||||
23+ |
NA |
1136 |
专做原装正品,假一罚百! |
询价 | |||
MOT |
2023+ |
PLCC-68 |
50000 |
原装现货 |
询价 | ||
MOTOROLA/摩托罗拉 |
2023+ |
PLCC28 |
80000 |
一级代理/分销渠道价格优势 十年芯程一路只做原装正品 |
询价 | ||
MOROTOLA |
23+ |
QFP |
3600 |
绝对全新原装!现货!特价!请放心订购! |
询价 | ||
MOTOROLA |
06/07+ |
QFP |
156 |
询价 |