DSP56002中文资料恩XP数据手册PDF规格书

FEATURES

• 16-bit DSP56603 Digital Signal Processor

– High Performance DSP56600 Core

• 60 Million Instructions Per Second (MIPS) with a 60 MHz clock (at 2.7 volts)

• Object-code compatible with the DSP56000 and DSP56300 cores

• Highly parallel instruction set

• Fully pipelined 16

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16-bit parallel Multiplier-Accumulator (MAC)

• Two 40-bit accumulators including extension bits

• 40-bit parallel barrel shifter

• Position Independent Code (PIC) Support

• Unique DSP addressing modes

• On-chip memory-expandable hardware stack

• Nested hardware DO loops

• Fast auto-return interrupts

• On-chip Phase Lock Loop (PLL)

• On-Chip Emulation (OnCE™) module

• JTAG port

• Address Tracing mode reflects internal Program RAM accesses at external port

• On-chip support for software patching and enhancements

– On-Chip Memories

• Program RAM, X data RAM, and Y data RAM size is programmable:

• 3 K

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24-bit bootstrap ROM

– Off-Chip Memory Expansion

• Program memory expansion to one memory space of 64 K

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24-bit words

Switch

Mode

Program

RAM Size

X Data RAM

Size

Y Data RAM

Size

disabled 16.5 K

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24-bit 8 K

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16-bit 8 K

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16-bit

enabled 11.5 K

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24-bit 10.5 K

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16-bit 10.5 K

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16-bit