丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI2

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI2

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI2

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI2

德州仪器

丝印：DSLVDS1048；Package：TSSOP；3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

文件：1.19671 Mbytes 页数：25 Pages

TI1

德州仪器

丝印：DSLVDS1048；Package：TSSOP；3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

文件：1.19671 Mbytes 页数：25 Pages

TI1

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI2

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI2

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI2

德州仪器

丝印：DSLVDS1048；Package：TSSOP；DSLVDS1048 3.3-V LVDS Quad Channel High-Speed Differential Line Receiver

1 Features 1• Designed for Signal Rates up to 400 Mbps • Flow-Through Pinout Simplifies PCB Layout • 150-ps Channel-to-Channel Skew (Typical) • 100-ps Differential Skew (Typical) • 2.7-ns Maximum Propagation Delay • 3.3-V Power Supply Design • High Impedance LVDS Inputs on Power Down • Low

文件：759.49 Kbytes 页数：25 Pages

TI2

德州仪器