DS99R124QSQXSLASHNOPB.A中文资料德州仪器数据手册PDF规格书

PDF无图
厂商型号

DS99R124QSQXSLASHNOPB.A

功能描述

DS99R124Q 5 - 43 MHz 18-bit Color FPD-Link II to FPD-Link Converter

丝印标识

DS99R124Q

封装外壳

WQFN

文件大小

537.55 Kbytes

页面数量

34

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-12-18 9:15:00

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DS99R124QSQXSLASHNOPB.A价格和库存,欢迎联系客服免费人工找货

DS99R124QSQXSLASHNOPB.A规格书详情

1FEATURES

2• 5 – 43 MHz Support (140 Mbps to 1.2 Gbps

Serial Link)

• 4-Channel (3 data + 1 Clock) FPD-Link LVDS

Outputs

• 3 Low-Speed Over-Sampled LVCMOS Outputs

• AC Coupled STP Interconnect up to 10 Meters

in Length

• Integrated Input Termination

• @ Speed Link BIST Mode and Reporting Pin

• Optional I2C Compatible Serial Control Bus

• RGB666 + VS, HS, DE Converted from 1 Pair

• Power Down Mode Minimizes Power

Dissipation

• FAST Random Data Lock; no Reference Clock

Required

• Adjustable Input Receive Equalization

• LOCK (Real Time Link Status) Reporting Pin

• Low EMI FPD-Link Output

• SSCG Option for Lower EMI

• 1.8V or 3.3V Compatible I/O Interface

• Automotive Grade Product: AEC-Q100 Grade 2

Qualified

• >8 kV HBM and ISO 10605 ESD Rating

APPLICATIONS

• Automotive Display for Navigation

• Automotive Display for Entertainment

DESCRIPTION

The DS99R124Q converts FPD-Link II to FPD-Link. It

translates a high-speed serialized interface with an

embedded clock over a single pair (FPD-Link II) to

three LVDS data/control streams and one LVDS clock

pair (FPD-Link). This serial bus scheme greatly eases

system design by eliminating skew problems between

clock and data, reduces the number of connector

pins, reduces the interconnect size, weight, and cost,

and overall eases PCB layout. In addition, internal

DC balanced decoding is used to support AC-coupled

interconnects.

The DS99R124Q converter recovers the data (RGB)

and control signals and extracts the clock from a

serial stream (FPD-Link II). It is able to lock to the

incoming data stream without the use of a training

sequence or special SYNC patterns and does not

require a reference clock. A link status (LOCK) output

signal is provided.

Adjustable input equalization of the serial input

stream provides compensation for transmission

medium losses of the cable and reduces the mediuminduced

deterministic jitter. EMI is minimized by the

use of low voltage differential signaling, output state

select feature, and additional output spread spectrum

generation.

With fewer wires to the physical interface of the

display, FPD-Link output with LVDS technology is

ideal for high speed, low power and low EMI data

transfer.

The DS99R124Q is offered in a 48-pin WQFN

package and is specified over the automotive AEC- Q100 Grade 2 temperature range of -40˚C to +105˚C.

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