DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer

文件：1.85934 Mbytes 页数：31 Pages

TI

德州仪器

20-85 MHz 32-Bit Channel Link II Serializer / Deserializer

文件：1.912 Mbytes 页数：32 Pages

TI

德州仪器

20-85 MHz 32-Bit Channel Link II Serializer / Deserializer

文件：1.91499 Mbytes 页数：31 Pages

TI

德州仪器

DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer

文件：1.85934 Mbytes 页数：31 Pages

TI

德州仪器

20-85 MHz 32-Bit Channel Link II Serializer/Deserializer

文件：1.82054 Mbytes 页数：30 Pages

NSC

国半

Improving the Robustness of Channel Link Designs with Channel Link II Ser/Des

文件：171.97 Kbytes 页数：6 Pages

NSC

国半

20-85MHz 32 位频道链接 II 串行器

The DS92LV3241 (SER) serializes a 32-bit data bus into 2 or 4 (selectable) embedded clock LVDS serial channels for a data payload rate up to 2.72 Gbps over cables such as CATx, or backplanes FR-4 traces. The companion DS92LV3242 (DES) deserializes the 2 or 4 LVDS serial data channels, de-skews chann • Wide Operating Range Embedded Clock SER/DES \n• 20 to 85 MHz Parallel Clock\n• Selectable Serial LVDS Bus Width \n• Quad Lane Mode (40 to 85 MHz)\n• Simplified Clocking Architecture \n• No reference Clock Required\n• On-Chip Signal Conditioning for Robust Serial Connectivity \n• Data Randomization;

TI

德州仪器

Improving the Robustness of Channel Link Designs with Channel Link II Ser/Des

文件：171.97 Kbytes 页数：6 Pages

NSC

国半

20-85 MHz 32-Bit Channel Link II Serializer / Deserializer

文件：1.912 Mbytes 页数：32 Pages

TI

德州仪器

20-85 MHz 32-Bit Channel Link II Serializer / Deserializer

文件：1.91499 Mbytes 页数：31 Pages

TI

德州仪器