DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

1 Features 1• 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock • Application Payloads up to 1.2 Gbps • AC Coupled Interconnects: STP up to 10 m or Coax 20+ m • 1.8 V or 3.3 V Compatible LVCMOS I/O Interface • Integrated Terminations on Ser and Des • AT-SPEED BIST Mode and Reporting Pin • Conf

文件：1.237 Mbytes 页数：58 Pages

TI

德州仪器

5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

文件：1.44842 Mbytes 页数：54 Pages

TI

德州仪器

5-50MHz 24-Bit Channel Link II Serializer and Deserializer

文件：1.16028 Mbytes 页数：40 Pages

NSC

国半

5MHz 至 50MHz 24 位 Channel Link II 解串器

The DS92LV2411 (Serializer) and DS92LV2412 (Deserializer) chipset translates a parallel 24–bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size and inte • 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock\n• Application Payloads up to 1.2 Gbps\n• AC Coupled Interconnects: STP up to 10 m or Coax 20+m\n• 1.8 V or 3.3 V Compatible LVCMOS I/O Interface\n• Integrated Terminations on Ser and Des\n• AT-SPEED BIST Mode and Reporting Pin\n• Configurable by Pins ;

TI

德州仪器

丝印：LV2412SQ；Package：WQFN；DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

1 Features 1• 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock • Application Payloads up to 1.2 Gbps • AC Coupled Interconnects: STP up to 10 m or Coax 20+ m • 1.8 V or 3.3 V Compatible LVCMOS I/O Interface • Integrated Terminations on Ser and Des • AT-SPEED BIST Mode and Reporting Pin • Conf

文件：1.237 Mbytes 页数：58 Pages

TI

德州仪器

丝印：LV2412SQ；Package：WQFN；DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

1 Features 1• 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock • Application Payloads up to 1.2 Gbps • AC Coupled Interconnects: STP up to 10 m or Coax 20+ m • 1.8 V or 3.3 V Compatible LVCMOS I/O Interface • Integrated Terminations on Ser and Des • AT-SPEED BIST Mode and Reporting Pin • Conf

文件：1.237 Mbytes 页数：58 Pages

TI

德州仪器

丝印：LV2412SQ；Package：WQFN；DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

1 Features 1• 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock • Application Payloads up to 1.2 Gbps • AC Coupled Interconnects: STP up to 10 m or Coax 20+ m • 1.8 V or 3.3 V Compatible LVCMOS I/O Interface • Integrated Terminations on Ser and Des • AT-SPEED BIST Mode and Reporting Pin • Conf

文件：1.237 Mbytes 页数：58 Pages

TI

德州仪器

丝印：LV2412SQ；Package：WQFN；DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

1 Features 1• 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock • Application Payloads up to 1.2 Gbps • AC Coupled Interconnects: STP up to 10 m or Coax 20+ m • 1.8 V or 3.3 V Compatible LVCMOS I/O Interface • Integrated Terminations on Ser and Des • AT-SPEED BIST Mode and Reporting Pin • Conf

文件：1.237 Mbytes 页数：58 Pages

TI

德州仪器

丝印：LV2412SQ；Package：WQFN；DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

1 Features 1• 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock • Application Payloads up to 1.2 Gbps • AC Coupled Interconnects: STP up to 10 m or Coax 20+ m • 1.8 V or 3.3 V Compatible LVCMOS I/O Interface • Integrated Terminations on Ser and Des • AT-SPEED BIST Mode and Reporting Pin • Conf

文件：1.237 Mbytes 页数：58 Pages

TI

德州仪器

丝印：LV2412SQ；Package：WQFN；DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer

1 Features 1• 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock • Application Payloads up to 1.2 Gbps • AC Coupled Interconnects: STP up to 10 m or Coax 20+ m • 1.8 V or 3.3 V Compatible LVCMOS I/O Interface • Integrated Terminations on Ser and Des • AT-SPEED BIST Mode and Reporting Pin • Conf

文件：1.237 Mbytes 页数：58 Pages

TI

德州仪器