DS90LV804TSQSLASHNOPB中文资料德州仪器数据手册PDF规格书

1FEATURES

23• 800 Mbps Data Rate per Channel

• Low Output Skew and Jitter

• LVDS/CML/LVPECL Compatible Input, LVDS

Output

• On-Chip 100Ω Input and Output Termination

• 12 kV ESD Protection on LVDS Outputs

• Single 3.3V Supply

• Very Low Power Consumption

• Industrial -40 to +85°C Temperature Range

• Small WQFN Package Footprint

DESCRIPTION

The DS90LV804 is a four channel 800 Mbps LVDS

buffer/repeater. In many large systems, signals are

distributed across cables and signal integrity is highly

dependent on the data rate, cable type, length, and

the termination scheme.

In order to maximize signal integrity, the DS90LV804

features both an internal input and output (source)

termination to eliminate these extra components from

the board, and to also place the terminations as close

as possible to receiver inputs and driver output. This

is especially significant when driving longer cables.

The DS90LV804, available in the WQFN (Leadless

Leadframe Package) package, minimizes the

footprint, and improves system performance.

An output enable pin is provided, which allows the

user to place the LVDS outputs and internal biasing

generators in a TRI-STATE®, low power mode.

The differential inputs interface to LVDS, and Bus

LVDS signals such as those on TI's 10-, 16-, and 18-

bit Bus LVDS SerDes, as well as CML and LVPECL.

The differential inputs are internally terminated with a

100Ω resistor to improve performance and minimize

board space. This function is especially useful for

boosting signals over lossy cables or point-to-point

backplane configurations.