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DS90LV018ATMXSLASHNOPB中文资料德州仪器数据手册PDF规格书

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厂商型号

DS90LV018ATMXSLASHNOPB

功能描述

DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

丝印标识

90LV018ATM

封装外壳

SOIC

文件大小

744.57 Kbytes

页面数量

20

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-12-13 17:32:00

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DS90LV018ATMXSLASHNOPB规格书详情

1FEATURES

2• >400 Mbps (200 MHz) Switching Rates

• 50 ps Differential Skew (Typical)

• 2.5 ns Maximum Propagation Delay

• 3.3V Power Supply Design

• Flow-Through Pinout

• Power Down High Impedance on LVDS Inputs

• Low Power Design (18mW @ 3.3V Static)

• Interoperable with Existing 5V LVDS Networks

• Accepts Small Swing (350 mV Typical) failDifferential

Signal Levels

• Supports Open, Short and Terminated Input

Fail-Safe

• Conforms to ANSI/TIA/EIA-644 Standard

• Industrial Temperature Operating Range

– (−40°C to +85°C)

• Available in SOIC Package

DESCRIPTION

The DS90LV018A is a single CMOS differential line

receiver designed for applications requiring ultra low

power dissipation, low noise and high data rates. The

device is designed to support data rates in excess of

400 Mbps (200 MHz) utilizing Low Voltage Differential

Signaling (LVDS) technology.

The DS90LV018A accepts low voltage (350 mV

typical) differential input signals and translates them

to 3V CMOS output levels. The receiver also

supports open, shorted and terminated (100Ω) input

fail-safe. The receiver output will be HIGH for all failDifferential

safe conditions. The DS90LV018A has a flow-through

design for easy PCB layout.

The DS90LV018A and companion LVDS line driver

provide a new alternative to high power PECL/ECL

devices for high speed point-to-point interface

applications.

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