DS90LV012ATMFSLASHNOPB中文资料德州仪器数据手册PDF规格书

1 Features

• Compatible with ANSI TIA/EIA-644-A Standard

• >400 Mbps (200 MHz) switching rates

• 100 ps differential skew (typical)

• 3.5 ns maximum propagation delay

• Integrated line termination resistor (102Ω typical)

• Single 3.3V power supply design (2.7V to 3.6V

range)

• Power down high impedance on LVDS inputs

• Accepts small swing (350 mV typical) differential

signal levels

• LVDS receiver inputs accept LVDS/BLVDS/

LVPECL inputs

• Supports open, short and terminated input fail-safe

• Pinout simplifies PCB layout

• Low Power Dissipation (10mW typical@ 3.3V

static)

• SOT-23 5-lead package

• Leadless WSON-8 package (3x3 mm body size)

• Electrically similar to the DS90LV018A

• Fabricated with advanced CMOS process

technology

• Industrial temperature operating range (−40°C to

+85°C)

2 Description

The DS90LV012A and DS90LT012A are single CMOS

differential line receivers designed for applications

requiring ultra low power dissipation, low noise, and

high data rates. The devices are designed to support

data rates in excess of 400 Mbps (200 MHz) utilizing

Low Voltage Differential Swing (LVDS) technology

The DS90LV012A and DS90LT012A accept low

voltage (350 mV typical) differential input signals and

translates them to 3-V CMOS output levels. The

receivers also support open, shorted, and terminated

(100Ω) input fail-safe. The receiver output will be

HIGH for all fail-safe conditions. The DS90LV012A

has a pinout designed for easy PCB layout. The

DS90LT012A includes an input line termination

resistor for point-to-point applications.

The DS90LV012A and DS90LT012A, and companion

LVDS line driver provide a new alternative to high

power PECL/ECL devices for high speed interface

applications.