3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link—65 MHz

General Description The DS90CF383 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of

文件：261.829 Kbytes 页数：11 Pages

TI

德州仪器

3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link—65 MHz

General Description The DS90CF383 transmitter converts 28 bits of CMOS/TTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link. Every cycle of the transmit clock 28 bits of

文件：261.829 Kbytes 页数：11 Pages

TI

德州仪器

3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link??5 MHz

文件：262.55 Kbytes 页数：11 Pages

TI

德州仪器

3.3V LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link??5 MHz

文件：262.55 Kbytes 页数：11 Pages

TI

德州仪器

Package：56-TFSOP（0.240"，6.10mm 宽）；包装：托盘 类别：集成电路（IC） 专用 描述：IC INTERFACE SPECIALIZED 56TSSOP

TI

德州仪器