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DS90C383MTDSLASHNOPB.B中文资料德州仪器数据手册PDF规格书

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厂商型号

DS90C383MTDSLASHNOPB.B

功能描述

DS90C383/DS90CF384 3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz

丝印标识

DS90C383MTD

封装外壳

TSSOP

文件大小

811.57 Kbytes

页面数量

30

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-10-5 23:00:00

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DS90C383MTDSLASHNOPB.B价格和库存,欢迎联系客服免费人工找货

DS90C383MTDSLASHNOPB.B规格书详情

General Description

The DS90C383 transmitter converts 28 bits of LVCMOS/

LVTTL data into four LVDS (Low Voltage Differential Signaling)

data streams. A phase-locked transmit clock is transmitted

in parallel with the data streams over a fifth LVDS link.

Every cycle of the transmit clock 28 bits of input data are

sampled and transmitted. The DS90CF384 receiver converts

the LVDS data streams back into 28 bits of LVCMOS/

LVTTL data. At a transmit clock frequency of 65 MHz, 24 bits

of RGB data and 3 bits of LCD timing and control data

(FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455

Mbps per LVDS data channel. Using a 65 MHz clock, the

data throughputs is 227 Mbytes/sec. The transmitter is offered

with programmable edge data strobes for convenient

interface with a variety of graphics controllers. The transmitter

can be programmed for Rising edge strobe or Falling

edge strobe through a dedicated pin. A Rising edge transmitter

will inter-operate with a Falling edge receiver

(DS90CF384) without any translation logic. Both devices are

also offered in a 64 ball, 0.8mm fine pitch ball grid array

(FBGA) package which provides a 44 % reduction in PCB

footprint compared to the TSSOP package.

This chipset is an ideal means to solve EMI and cable size

problems associated with wide, high speed TTL interfaces.

特性 Features

20 to 65 MHz shift clock support

Programmable transmitter (DS90C383) strobe select

Rising or Falling edge strobe)

Single 3.3V supply

Chipset (Tx + Rx) power consumption < 250 mW (typ)

Power-down mode (< 0.5 mW total)

Single pixel per clock XGA (1024x768) ready

Supports VGA, SVGA, XGA and higher addressability.

Up to 227 Megabytes/sec bandwidth

Up to 1.8 Gbps throughput

Narrow bus reduces cable size and cost

290 mV swing LVDS devices for low EMI

PLL requires no external components

Low profile 56-lead TSSOP package.

Also available in a 64 ball, 0.8mm fine pitch ball grid

array (FBGA) package

Falling edge data strobe Receiver

Compatible with TIA/EIA-644 LVDS standard

ESD rating >7 kV

Operating Temperature: −40°C to +85°C

供应商 型号 品牌 批号 封装 库存 备注 价格
TI(德州仪器)
24+
TSSOP56
7350
现货供应,当天可交货!免费送样,原厂技术支持!!!
询价
NS/国半
24+
NA/
48
优势代理渠道,原装正品,可全系列订货开增值税票
询价
NS
2016+
TSSOP56
3900
只做原装,假一罚十,公司可开17%增值税发票!
询价
TI
24+
TSSOP56
80000
只做自己库存 全新原装进口正品假一赔百 可开13%增
询价
NS
25+
TSSOP56
165
原装正品,假一罚十!
询价
NS
2450+
TSSOP56
6540
只做原厂原装正品现货或订货!终端工厂可以申请样品!
询价
NS
24+
TSSOP
47
询价
DS90C383MTDX
798
798
询价
TI
2025+
TSSOP-56
16000
原装优势绝对有货
询价
TI/德州仪器
23+
TSSOP-56
1000
正规渠道,只有原装!
询价