DS90C032B中文资料LVDS 四路 CMOS 差动线路接收器数据手册TI规格书

描述 Description

The DS90C032B is a quad CMOS differential line receiver designed for applications requiring ultra low power dissipation and high data rates. The device supports data rates in excess of 155.5 Mbps (77.7 MHz) and uses Low Voltage Differential Signaling (LVDS) technology.
The DS90C032B accepts low voltage (350 mV) differential input signals and translates them to CMOS (TTL compatible) output levels. The receiver supports a TRI-STATE function that may be used to multiplex outputs. The receiver also supports OPEN Failsafe and terminated (100Ω) input Failsafe with the addition of external failsafe biasing. Receiver output will be HIGH for both Failsafe conditions.
The DS90C032B provides power-off high impedance LVDS inputs. This feature assures minimal loading effect on the LVDS bus lines when VCC is not present.
The DS90C032B and companion line driver (DS90C031B) provide a new alternative to high power pseudo-ECL devices for high-speed point-to-point interface applications.

特性 Features

• >155.5 Mbps (77.7 MHz) Switching Rates
• Accepts Small Swing (350 mV) Differential Signal Levels
• High Impedance LVDS Inputs with Power Down
• Ultra Low Power Dissipation
• 600 ps Maximum Differential Skew (5V, 25°C)
• 6.0 ns Maximum Propagation Delay
• Industrial Operating Temperature Range
• Available in Surface Mount Packaging (SOIC)
• Pin Compatible with DS26C32A, MB570 (PECL) and 41LF (PECL)
• Supports OPEN and Terminated Input Failsafe
• Conforms to ANSI/TIA/EIA-644 LVDS Standard