DS8615中文资料美国国家半导体数据手册PDF规格书

General Description

The DS8615 series products are low power dual modulus

prescalers which divide by 32/33 and 40/41 respectively.

The modulus control (MC) input selects division by N when

at a high TTL level and division by N a 1 when at a low TTL

level. The clock inputs are buffered, providing 40/100

mVrms input sensitivity. The two outputs provide the user

the option to wire either a totem-pole or open-collector output structure. Additionally, the user can wire a resistor between the two output pins to minimize edge transition emissions. The outputs are designed to drive positive edge triggered PLLs. These products can be operated from either an

unregulated 5.5V to 13.5V source or regulated 5V g10

source. Unregulated operation is obtained by connecting VS

to the source with VREG open. Regulated operation is obtained by connecting both VS and VREG to the supply

source.

The device can be used in phase-locked loop applications

such as FM radio or other communications bands to prescale the input frequency down to a more usable level. A

digital frequency display system can also be derived separately or in conjunction with a phase-locked loop, and it can

extend the useful range of many inexpensive frequency

counters to 225 MHz.

特性 Features

- Input frequency: 130 MHz (-4); 225 MHz (-2)

- Low power: 10 mA (-4, -2)

- Input sensitivity: 100 mVrms (-4); 40 mVrms (-2)

- Pin compatible with Motorola MC12015-16 prescalers

- Unregulated/regulated power supply option