包装：盒 功能：以太网 类别：开发板，套件，编程器 评估和演示板及套件 描述：KIT EVAL DS4950

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亚德诺

Low-Voltage PLL Clock Driver

Description The LCK4950 is a PLL-based clock driver device intended for high-performance clock tree designs. The LCK4950 is 3.3 V compatible with output frequencies of up to 180 MHz and output skews of 200 ps. The LCK4950 can accommodate the most demanding tree designs by employing a fully differ

文件：215.76 Kbytes 页数：16 Pages

agere

7.5W Mono-BTL or 3.1W Stereo Audio Power Amplifier

文件：1.447 Mbytes 页数：25 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司

7.5W Mono-BTL or 3.1W Stereo Audio Power Amplifier

文件：1.447 Mbytes 页数：25 Pages

NSCNational Semiconductor (TI)

美国国家半导体美国国家半导体公司