1Kb Protected 1-Wire EEPROM with SHA-1 Engine

Features ● 1024 Bits of EEPROM Memory Partitioned into Four Pages of 256 Bits ● On-Chip 512-Bit SHA-1 Engine to Compute 160- Bit Message Authentication Codes (MACs) and to Generate Secrets ● Dedicated 64-Bit Write-Only Secret with a Feature to Extend the Secret Size to 320 Bits by Setting a

文件：363.09 Kbytes 页数：2 Pages

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亚德诺

1Kb Protected 1-Wire EEPROM with SHA-1 Engine

Features ● 1024 Bits of EEPROM Memory Partitioned into Four Pages of 256 Bits ● On-Chip 512-Bit SHA-1 Engine to Compute 160- Bit Message Authentication Codes (MACs) and to Generate Secrets ● Dedicated 64-Bit Write-Only Secret with a Feature to Extend the Secret Size to 320 Bits by Setting a

文件：363.09 Kbytes 页数：2 Pages

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亚德诺

1Kb Protected 1-Wire EEPROM with SHA-1 Engine

General Description The DS28E01-100 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratch pad to perform write o

文件：164.93 Kbytes 页数：20 Pages

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1K-Bit Protected 1-Wire EEPROM with SHA-1 Engine

GENERAL DESCRIPTION The DS28E01-100 combines1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write ope

文件：219 Kbytes 页数：16 Pages

DALLAS

1K-Bit Protected 1-Wire EEPROM with SHA-1 Engine

GENERAL DESCRIPTION The DS28E01-100 combines1024 bits of EEPROM with challenge-and-response authentication security implemented with the ISO/IEC 10118-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write ope

文件：219 Kbytes 页数：16 Pages

DALLAS

1-Wire SHA-1 Authenticated 1Kb EEPROM with 1.8V Operation

General Description The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations.

文件：189.7 Kbytes 页数：21 Pages

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1-Wire SHA-1 Authenticated 1Kb EEPROM with 1.8V Operation

General Description The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations.

文件：189.7 Kbytes 页数：21 Pages

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美信

1-Wire SHA-1 Authenticated 1Kb EEPROM with 1.8V Operation

General Description The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations.

文件：189.7 Kbytes 页数：21 Pages

MAXIM

美信

1-Wire SHA-1 Authenticated 1Kb EEPROM with 1.8V Operation

General Description The DS28E02 combines 1024 bits of EEPROM with challenge-and-response authentication security implemented with the FIPS 180-3 Secure Hash Algorithm (SHA-1). The 1024-bit EEPROM array is configured as four pages of 256 bits with a 64-bit scratchpad to perform write operations.

文件：189.7 Kbytes 页数：21 Pages

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4096-Bit Addressable 1-Wire EEPROM with PIO

GENERAL DESCRIPTION The DS28E04-100 is a 4096-bit, 1-Wire® EEPROM chip with seven address inputs. The address inputs are directly mapped into the 1-Wire 64-bit Device ID Number to easily enable the host system to identify the physical location or functional association of the DS28E04-100 in a mul

文件：853.92 Kbytes 页数：37 Pages

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