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DS26C32ATMXSLASHNOPB.A中文资料德州仪器数据手册PDF规格书

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厂商型号

DS26C32ATMXSLASHNOPB.A

功能描述

DS26C32AT/DS26C32AM Quad Differential Line Receiver

丝印标识

DS26C32ATM

封装外壳

SOIC

文件大小

517.299 Kbytes

页面数量

16

生产厂商

TI

中文名称

德州仪器

网址

网址

数据手册

下载地址一下载地址二到原厂下载

更新时间

2025-10-13 19:06:00

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DS26C32ATMXSLASHNOPB.A规格书详情

1FEATURES

2• CMOS Design for Low Power

• ±0.2V Sensitivity over Input Common Mode

Voltage Range

• Typical Propagation Delays: 19 ns

• Typical Input hysteresis: 60 mV

• Inputs Won't Load Line When VCC = 0V

• Meets the Requirements of EIA Standard RS-422

• TRI-STATE Outputs for Connection to System

Buses

• Available in Surface Mount

• Mil-Std-883C Compliant

DESCRIPTION

The DS26C32A is a quad differential line receiver

designed to meet the RS-422, RS-423, and Federal

Standards 1020 and 1030 for balanced and

unbalanced digital data transmission, while retaining

the low power characteristics of CMOS.

The DS26C32A has an input sensitivity of 200 mV

over the common mode input voltage range of ±7V.

The DS26C32A features internal pull-up and pull

down resistors which prevent output oscillation on

unused channels.

The DS26C32A provides an enable and disable

function common to all four receivers. It also features

TRI-STATE outputs with 6 mA source and sink

capability. This product is pin compatible with the

DS26LS32A and the AM26LS32.

供应商 型号 品牌 批号 封装 库存 备注 价格
NS/国半
23+
DIP-16
8215
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NS
05+
DIP
82
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24+
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20000
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NS
DIP16
95+
48
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NSC
23+
原装原封
8888
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NSC
2016+
DIP16
3116
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NS/国半
23+
DIP16
9800
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NATIONAL SEMICONDUCTOR CORP.
XR418AB
30
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NS
22+
DIP-16
8000
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