DS2153Q集成电路（IC）的电信规格书PDF中文资料

DESCRIPTION

The DS2153Q T1 Single-Chip Transceiver (SCT) contains all of the necessary functions for connection to E1 lines. The onboard clock/data recovery circuitry coverts the AMI/HDB3 E1 waveforms to a NRZ serial stream. The DS2153 automatically adjusts to E1 22 AWG (0.6 mm) twisted-pair cables from 0 to 1.5 km. The device can generate the necessary G.703 waveshapes for both 75-ohm and 120-ohm cables. The onboard jitter attenuator (selectable to either 32 bits or 128 bits) can be placed in either the transmit or receive data paths. The framer locates the frame and multiframe boundaries and monitors the data stream for alarms. It is also used for extracting and inserting signaling data, Si, and Sa-bit information.

FEATURES

■ Complete E1(CEPT) PCM-30/ISDN-PRI transceiver functionality

■ Onboard line interface for clock/data recovery and waveshaping

■ 32-bit or 128-bit jitter attenuator

■ Generates line build-outs for both 120-ohm and 75-ohm lines

■ Frames to FAS, CAS, and CRC4 formats

■ Dual onboard two-frame elastic store slip buffers that can connect to backplanes up to 8.192 MHz

■ 8-bit parallel control port that can be used on either multiplexed or non-multiplexed buses

■ Extracts and inserts CAS signaling

■ Detects and generates Remote and AIS alarms

■ Programmable output clocks for Fractional E1, H0, and H12 applications

■ Fully independent transmit and receive functionality

■ Full access to both Si and Sa bits

■ Three separate loopbacks for testing

■ Large counters for bipolar and code violations, CRC4 code word errors, FAS errors, and E bits

■ Pin-compatible with DS2151Q T1 SingleChip Transceiver

■ 5V supply; low power CMOS

■ Industrial grade version (-40°C to +85°C) available (DS2153QN)