DRV8952DDWR中文资料德州仪器数据手册PDF规格书

1 Features

• Four-channel half-bridge driver

– Independent control of each half-bridge

• 4.5 V to 55 V operating supply voltage range

• Low RDS(ON): 50 mΩ for each FET (24 V, 25 °C)

• High current capacity:

– DDW package: Up to 5-A per output

– PWP package: Up to 4-A per output

• Can drive various types of loads -

– Up to four solenoids or valves

– One stepper motor

– Two brushed-DC motors

– One or two thermoelectric coolers (TEC)

– One 3-phase brushless-DC motor

– One 3-phase permanent magnet synchronous

motor (PMSM)

• Integrated current sense and regulation

– Current sensing across high-side MOSFETs

– IPROPI outputs for each half-bridge (DDW)

– 5 sense accuracy at maximum current

– Optional external sense resistor

• Pin-to-pin compatible with:

– DRV8955PWP: 48V, 4-ch half-bridge driver

– DRV8962DDW: 65V, 4-ch half-bridge driver

• Separate logic supply voltage (VCC) (DDW)

• Programmable output rise/fall time (DDW)

• Programmable fault recovery method (DDW)

• Supports 1.8-V, 3.3-V, 5.0-V logic inputs

• Low-current sleep mode (3 μA)

• Protection features

– VM undervoltage lockout (UVLO)

– Charge pump undervoltage (CPUV)

– Overcurrent protection (OCP)

– Thermal shutdown (OTSD)

– Fault condition output (nFAULT)

2 Applications

• Factory Automation, Stepper Drives and Robotics

• Medical Imaging, Diagnostics and Equipment

• Stage Lighting

• PLCs

• TEC Drivers

• BLDC Motor Modules

• Brushed-DC and Stepper Motor drivers

3 Description

The DRV8952 is a wide-voltage, high-power, fourchannel

half-bridge driver for a wide variety of

industrial applications. The device supports up to 55-V

supply voltage, and integrated MOSFETs with 50 mΩ

on-resistance allow up to 5-A current on each output

with the DDW package; and up to 4-A current per

output with the PWP package.

The device can be used for driving up to four

solenoids or valves, one stepper motor, two brushed-

DC motors, one BLDC or PMSM motor and up to

two thermoelectric coolers (Peltier elements). The

output stage of the device consists of N-channel

power MOSFETs configured as four independent

half-bridges, charge pump regulator, current sensing

and regulation circuits, current sense outputs and

protection circuitry.

Integrated current sensing across the high-side

MOSFETs allows the device to regulate the current

when the load is connected from output to ground. A

current regulation limit can be set with an adjustable

external voltage reference (VREF). With the DDW

package, the device provides four proportional current

output pins, one for each half-bridge high-side FET.

Optional external sense resistors can be connected

from the PGND pins to the system ground.

A low-power sleep mode is provided to achieve ultralow

quiescent current. Internal protection features are

provided for supply undervoltage lockout (UVLO),

charge pump undervoltage (CPUV), output over

current (OCP), and device overtemperature (OTSD).