DRV8718SQRVJRQ1集成电路（IC）的全半桥驱动器规格书PDF中文资料

DRV8718SQRVJRQ1属于集成电路（IC）的全半桥驱动器。由德州仪器制造生产的DRV8718SQRVJRQ1全半桥驱动器器件属于电桥驱动器电源管理集成电路 (PMIC) 系列，包含两个或多个功率晶体管，以及在外部器件控制下将其用作开关所需的电路。这些晶体管通常在内部配置为成对串联连接（称为半桥），因而任意指定晶体管对之间的结点都可以连接至两个电源轨中的任一个。这类器件常用于将控制器件（如微控制器）提供的低电平信号转换为操作执行器（如步进电机或无刷电机）所需的较大功率信号。

1 Features

• AEC-Q100 qualified for automotive applications:

– Temperature grade 1: –40°C to +125°C, TA

• Multi-channel half-bridge gate drivers

– Pin to pin 4 and 8 half-bridge driver variants

– 4.9-V to 37-V (40-V abs. max) operating range

– 4 PWM inputs with output mapping

– Tripler charge pump for 100 PWM

– Half-bridge, H-bridge, and SPI control modes

• Smart multi-stage gate drive architecture

– Adjustable slew rate control

– Adaptive propagation delay control

– 50-μA to 62-mA peak source current output

– 50-μA to 62-mA peak sink current output

– Integrated dead-time handshaking

• 2x wide common mode current shunt amplifiers

– Supports inline, high-side, or low-side

– Adjustable gain settings (10, 20, 40, 80 V/V)

• Multiple interface options available

– SPI: Detailed configuration and diagnostics

– H/W: Simplified control and less MCU pins

• Compact VQFN packages with wettable flanks

• Integrated protection features

– Dedicated driver disable pin (DRVOFF)

– Low IQ, sleep mode motor braking (BRAKE)

– Supply and regulator voltage monitors

– MOSFET VDS overcurrent monitors

– MOSFET VGS gate fault monitors

– Charge pump for reverse polarity MOSFET

– Offline open load and short circuit diagnostics

– Device thermal warning and shutdown

– Window watchdog timer

– Fault condition interrupt pin (nFAULT)

2 Applications

• Automotive brushed DC motors

• Power seat modules

• Power trunk and lift gate

• Door module

• Body control modules

• Power sunroof

• Transmission and engine control modules

3 Description

The DRV871x-Q1 family of devices are highly

integrated, multi-channel gate drivers intended for

driving multiple motors or loads. The devices integrate

either 4 (DRV8714-Q1) or 8 (DRV8718-Q1) halfbridge

gate drivers, driver power supplies, current

shunt amplifiers, and protection monitors reducing

total system complexity, size, and cost.

A smart gate drive architecture manages dead time to

prevent shoot-through, controls slew rate to decrease

electromagnetic interference (EMI), and optimizes

propagation delay for optimal performance.

Input modes are provided for independent halfbridge

or H-bridge control. Four PWM inputs can

be multiplexed between the different drivers in

combination with SPI control.

Wide common mode shunt amplifiers provide inline

current sensing to continuously measure motor

current even during recirculating windows. The

amplifier can be used in low-side or high-side sense

configurations if inline sensing is not required.

The devices provide an array of protection features to

ensure robust system operation. These include under

and overvoltage monitors, VDS overcurrent and VGS

gate fault monitors for the external MOSFETs, offline

open load and short circuit diagnostics, and internal

thermal warning and shutdown protection.