DM9602N中文资料仙童半导体数据手册PDF规格书

General Description

These dual resettable, retriggerable one shots have two inputs per function; one which is active HIGH, and one which is active LOW. This allows the designer to employ

either leading-edge or trailing-edge triggering, which is independent of input transition times. When input conditions for triggering are met, a new cycle starts and the external capacitor is allowed to rapidly discharge and then charge again. The retriggerable feature permits output

pulse widths to be extended. In fact a continuous true out put can be maintained by having an input cycle time which is shorter than the output cycle time. The output pulse may then be terminated at any time by applying a LOW logic level to the RESET pin. Retriggering may be inhibited by either connecting the Q output to an active HIGH input, or the Qoutput to an active LOW input.

特性 Features

■70 ns to ∞output width range

■Resettable and retriggerable—0 to 100 duty cycle

■TTL input gating—leading or trailing edge triggering

■Complementary TTL outputs

■Optional retrigger lock-out capability

■Pulse width compensated for VCCand temperature variations