DM9000B数据手册Davicom中文资料规格书

描述 Description

The DM9000B is a fully integrated and cost-effective low pin count single chip Fast Ethernet controller with a general processor interface, a 10/100M PHY and 4K Dword SRAM.

特性 Features

·Supports automatically load vendor ID and product ID from EEPROM\r
·Optional EEPROM configuration\r
·Very low power consumption mode:\r
·- Power reduced mode (cable detection)\r
·- Power down mode\r
·- Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction\r
·Compatible with 3.3V and 5.0V tolerant I/O\r
·DSP architecture PHY Transceiver\r
·48-pin LQFP, 0.18 um process\r
·Supports processor interface: byte/word of I/O command to internal memory data operation\r
·Integrated 10/100M transceiver With HP Auto-MDIX\r
·Supports back pressure mode for half-duplex\r
·IEEE802.3x flow control for full-duplex mode\r
·Supports wakeup frame, link status change and magic packet events for remote wake up\r
·Support 100M Fiber interface\r
·Integrated 16K Byte SRAM\r
·Build in 3.3V to 1.8V regulator\r
·Supports early Transmit\r
·Supports IP/TCP/UDP checksum generation and checking