Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly rela

文件：50.7 Kbytes 页数：5 Pages

Fairchild

仙童半导体

Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear, and Complementary Outputs

General Description This device contains two independent positive-edge-triggered D flip-flops with complementary outputs. The information on the D input is accepted by the flip-flops on the positive going edge of the clock pulse. The triggering occurs at a voltage level and is not directly rela

文件：50.7 Kbytes 页数：5 Pages

Fairchild

仙童半导体

TTL HD74/HD74S Series

文件：143.51 Kbytes 页数：4 Pages

HitachiHitachi Semiconductor

日立日立公司

Transistor transistor logic

文件：104.62 Kbytes 页数：1 Pages

NTE