Octal Bus Transceiver and Register

General Description This device incorporates an octal bus transceiver and an octal D-type register configured to enable multiplexed transmission of data from bus to bus or internal register to bus. This bus transceiver features totem-pole 3-STATE outputs designed specifically for driving highly-

文件：84.52 Kbytes 页数：8 Pages

Fairchild

仙童半导体

Package：24-SOIC（0.295"，7.50mm 宽）；包装：管件 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TRANSCEIVER INVERT 5.5V 24SOP

ONSEMI

安森美半导体

Package：24-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR） 类别：集成电路（IC） 缓冲器，驱动器，接收器，收发器 描述：IC TRANSCEIVER INVERT 5.5V 24SOP

ONSEMI

安森美半导体

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：1.002 Mbytes 页数：27 Pages

TI

德州仪器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

文件：270.88 Kbytes 页数：18 Pages

TI

德州仪器

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Independent Registers for A and B Buses Multiplexed Real-Time and Stored Data Choice of True or Inverting Data Paths Choice of 3-State or Open-Collector Outputs Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (J

文件：462.32 Kbytes 页数：25 Pages

TI

德州仪器