DM74ALS640AWMX数据手册集成电路（IC）的缓冲器驱动器接收器收发器规格书PDF

描述 Description

General Description
This inverting octal bus transceiver is designed for asynchronous two-way communication between data busses. This device transmits data from the A bus to the B bus or from the B bus to the A bus depending upon the level at the direction control (DIR) input. The enable input (G) can be used to disable the device so the busses are effectively isolated.

特性 Features

■ Advanced Oxide-isolated Ion-implanted Schottky TTL process
■ Switching performance is guaranteed over full temperature and VCC supply range
■ Switching performance specified at 50 pF
■ PNP input design reduces input loading

简介

DM74ALS640AWMX属于集成电路（IC）的缓冲器驱动器接收器收发器。由制造生产的DM74ALS640AWMX缓冲器，驱动器，接收器，收发器逻辑缓冲器、驱动器、接收器和收发器允许隔离对某个电路的逻辑信号的访问，以用于另一电路。缓冲器将其输入信号（不变或反相）传递到其输出，并可能用于清除弱信号或驱动负载。在布尔逻辑仿真器中，缓冲器主要用于增加传播延迟。逻辑接收器和收发器允许在数据总线之间进行隔离通信。