Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pul

文件：76.76 Kbytes 页数：7 Pages

Fairchild

仙童半导体

Octal D-Type Edge-Triggered Flip-Flop with Clear

General Description These monolithic, positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup requirements is transferred to the Q outputs on the positive-going edge of the clock pulse.

文件：183.6 Kbytes 页数：9 Pages

ONSEMI

安森美半导体

Package：20-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR） 功能：主复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20SOIC

ONSEMI

安森美半导体

Package：20-SOIC（0.295"，7.50mm 宽）；包装：卷带（TR） 功能：主复位 类别：集成电路（IC） 触发器 描述：IC FF D-TYPE SNGL 8BIT 20SOIC

ONSEMI

安森美半导体