These positive-edge-triggered flip-flops utilize TTL circuitry to implement D-type flip-flop logic

文件：424.33 Kbytes 页数：10 Pages

TI

德州仪器

Hex/Quad D Flip-Flops with Clear

文件：174.65 Kbytes 页数：8 Pages

NSC

国半

HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR

文件：318.44 Kbytes 页数：7 Pages

TI

德州仪器

QUAD D FLIP-FLOP

The LSTTL /MSI SN54 /74LS175 is a high speed Quad D Flip-Flop. The device is useful for general flip-flop requirements where clock and clear inputs are common. The information on the D inputs is stored during the LOW to HIGH clock transition. Both true and complemented outputs of each flip-flop ar

文件：171.69 Kbytes 页数：5 Pages

Motorola

摩托罗拉

HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR

文件：403.5 Kbytes 页数：13 Pages

TI

德州仪器