DDU8C-5125中文资料DATADELAY数据手册PDF规格书

FUNCTIONAL DESCRIPTION

The DDU8C-series device is a 5-tap digitally buffered delay line. The signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an amount determined by the device dash number (See Table). The total delay of the line is measured from IN to T5. The nominal tap-to-tap delay increment is given by one-fifth of the total delay.

FEATURES

• Five equally spaced outputs

• Fits standard 8-pin DIP socket

• Low profile

• Auto-insertable

• Input & outputs fully CMOS interfaced & buffered

• 10 T2L fan-out capability