DDU7C-100MC3中文资料DATADELAY数据手册PDF规格书

FUNCTIONAL DESCRIPTION

The DDU7C-series device is a 10-tap digitally buffered delay line. The signal input (IN) is reproduced at the outputs (T1-T10), shifted in time by an amount determined by the device dash number. The nominal tap-to-tap delay increment is given by 1/10 of the dash number. For dash numbers less than 50, the total delay of the line is measured from T1 to T10, with the nominal value given by 9 times the increment. The inherent delay from IN to T1 is nominally 8.0ns. For dash numbers greater than or equal to 50, the total delay of the line is measured from IN to T10, with the nominal value given by the dash number.

FEATURES

• Ten equally spaced outputs

• Fits standard 16-pin DIP socket

• Low profile

• Auto-insertable

• Input & outputs fully CMOS interfaced & buffered

• 10 T2L fan-out capability