DAC900_V01中文资料德州仪器数据手册PDF规格书

FEATURES

SINGLE +5V OR +3V OPERATION

HIGH SFDR: 5MHz Output at 100MSPS: 68dBc

LOW GLITCH: 3pV-s

LOW POWER: 170mW at +5V

INTERNAL REFERENCE:

Optional Ext. Reference

Adjustable Full-Scale Range

Multiplying Option

APPLICATIONS

COMMUNICATION TRANSMIT CHANNELS

WLL, Cellular Base Station

Digital Microwave Links

Cable Modems

WAVEFORM GENERATION

Direct Digital Synthesis (DDS)

Arbitrary Waveform Generation (ARB)

MEDICAL/ULTRASOUND

HIGH-SPEED INSTRUMENTATION AND CONTROL

VIDEO, DIGITAL TV

DESCRIPTION

The DAC900 is a high-speed, Digital-to-Analog Converter (DAC)

offering a 10-bit resolution option within the SpeedPlus family of

high-performance converters. Featuring pin compatibility among

family members, the DAC908, DAC902, and DAC904 provide a

component selection option to an 8-, 12-, and 14-bit resolution,

respectively. All models within this family of DACs support update

rates in excess of 165MSPS with excellent dynamic performance,

and are especially suited to fulfill the demands of a variety of

applications.

The advanced segmentation architecture of the DAC900 is optimized

to provide a high Spurious-Free Dynamic Range (SFDR) for

single-tone, as well as for multi-tone signals—essential when used

for the transmit signal path of communication systems.

The DAC900 has a high impedance (200kΩ) current output with a

nominal range of 20mA and an output compliance of up to 1.25V.

The differential outputs allow for both a differential or singleended

analog signal interface. The close matching of the current

outputs ensures superior dynamic performance in the differential

configuration, which can be implemented with a transformer.

Utilizing a small geometry CMOS process, the monolithic DAC900

can be operated on a wide, single-supply range of +2.7V to +5.5V.

Its low power consumption allows for use in portable and batteryoperated

systems. Further optimization can be realized by lowering

the output current with the adjustable full-scale option.

For noncontinuous operation of the DAC900, a power-down mode

results in only 45mW of standby power.

The DAC900 comes with an integrated 1.24V bandgap reference

and edge-triggered input latches, offering a complete converter

solution. Both +3V and +5V CMOS logic families can be interfaced

to the DAC900.

The reference structure of the DAC900 allows for additional

flexibility by utilizing the on-chip reference, or applying an external

reference. The full-scale output current can be adjusted over a

span of 2mA to 20mA, with one external resistor, while maintaining

the specified dynamic performance.

The DAC900 is available in SO-28 and TSSOP-28 packages.