丝印：DAC5686IPZP；Package：HTQFP(PZP)；16-BIT, 500-MSPS, 2×–16× INTERPOLATING DUAL-CHANNEL DIGITAL-TO-ANALOG CONVERTER

1FEATURES 234· 500-MSPS Maximum-Update-Rate DAC · WCDMA ACPR – 1 Carrier: 76 dB Centered at 30.72-MHz IF, 245.76 MSPS – 1 Carrier: 73 dB Centered at 61.44-MHz IF, 245.76 MSPS – 2 Carrier: 72 dB Centered at 30.72-MHz IF, 245.76 MSPS – 4 Carrier: 64 dB Centered at 92.16-MHz IF, 491.52 MSPS

文件：1.44772 Mbytes 页数：56 Pages

TI

德州仪器

Quad, 16-/12-Bit nanoDAC with SPI Interface

文件：683.65 Kbytes 页数：28 Pages

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亚德诺

Quad, 16-/14-/12-Bit nanoDAC

GENERAL DESCRIPTION The AD5686R/AD5685R/AD5684R, members of the nanoDAC+® family, are low power, quad, 16-/14-/12-bit buffered voltage output DACs. The devices include a 2.5 V, 2 ppm/°C internal reference (enabled by default) and a gain select pin giving a full-scale output of 2.5 V (gain = 1)

文件：830.95 Kbytes 页数：32 Pages

AD

亚德诺

Quad 16-/14-/12-Bit nanoDAC Reference, SPI Interface

文件：1.00518 Mbytes 页数：31 Pages

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亚德诺