Dual 14-bit DAC, up to 125 Msps

Features and benefits  Dual 14-bit resolution  125 Msps update rate  Single 3.3 V supply  Dual-port or Interleaved data modes  1.8 V, 3.3 V and 5 V compatible digital inputs  Internal and external reference  2 mA to 20 mA full-scale output current  Typical 185 mW power dissipation

文件：461.19 Kbytes 页数：25 Pages

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Dual 14-bit DAC, up to 125 Msps

Features and benefits  Dual 14-bit resolution  125 Msps update rate  Single 3.3 V supply  Dual-port or Interleaved data modes  1.8 V, 3.3 V and 5 V compatible digital inputs  Internal and external reference  2 mA to 20 mA full-scale output current  Typical 185 mW power dissipation

文件：461.19 Kbytes 页数：25 Pages

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Dual 14 bits DAC, up to 160 MHz, 2 x interpolating

Dual 14-bit resolution Spurious-Free Dynamic Range (SFDR) = 80 dBc at 2.5 MHz Input data rate up to 80 MHz 2 x interpolation filter Output data rate up to 160 MHz Single 3.3 V power supply Low noise capacitor-free integrated Phase-Locked Loup (PLL) Low power dissipation HTQFP80 package Am

文件：442.73 Kbytes 页数：18 Pages

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Dual 14-bit DAC, up to 650 Msps; 2, 4 and 8 interpolating

Features and benefits  Dual 14-bit resolution  650 Msps maximum update rate  Selectable 2, 4 or 8 interpolation filters  Input data rate up to 160 Msps  Very low noise cap-free integrated PLL  32-bit programmable NCO frequency  Dual port or Interleaved data modes  1.8 V and 3.3

文件：413.54 Kbytes 页数：41 Pages

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Dual 14-bit DAC, up to 650 Msps; 2, 4 and 8 interpolating

Features and benefits  Dual 14-bit resolution  650 Msps maximum update rate  Selectable 2, 4 or 8 interpolation filters  Input data rate up to 160 Msps  Very low noise cap-free integrated PLL  32-bit programmable NCO frequency  Dual port or Interleaved data modes  1.8 V and 3.3

文件：413.54 Kbytes 页数：41 Pages

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Dual 14-bit DAC, up to 750 Msps; 4x and 8x interpolating

Dual 14-bit resolution 750 Msps maximum update rate Selectable 4x or 8x interpolation filters Input data rate up to 185 Msps Very low noise cap-free integrated PLL 32-bit programmable NCO frequency Dual port or Interleaved data modes 1.8 V and 3.3 V power supplies LVDS compatible clock Tw

文件：415.78 Kbytes 页数：41 Pages

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Dual 14-bit DAC; up to 650 Msps; 2, 4 or 8 interpolating with JESD204A interface

 Dual 14-bit resolution  650 Msps maximum update rate  Selectable 2, 4 or 8 interpolation filters  Input data rate up to 312.5 Msps  Very low-noise cap-free integrated PLL  32-bit programmable NCO frequency  Four JESD204A serial input lanes  1.8 V and 3.3 V power supplies  LVDS

文件：693.41 Kbytes 页数：96 Pages

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Dual 14-bit DAC; up to 650 Msps; 2, 4 or 8 interpolating with JESD204A interface

 Dual 14-bit resolution  650 Msps maximum update rate  Selectable 2, 4 or 8 interpolation filters  Input data rate up to 312.5 Msps  Very low-noise cap-free integrated PLL  32-bit programmable NCO frequency  Four JESD204A serial input lanes  1.8 V and 3.3 V power supplies  LVDS

文件：693.41 Kbytes 页数：96 Pages

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Dual 14-bit DAC; up to 750 Msps; 2, 4 or 8 interpolating with JESD204A interface

 Dual 14-bit resolution  750 Msps maximum update rate  Selectable 2, 4 or 8 interpolation filters  Input data rate up to 312.5 Msps  Very low-noise cap-free integrated PLL  32-bit programmable NCO frequency  Four JESD204A serial input lanes  1.8 V and 3.3 V power supplies  LVDS

文件：633.18 Kbytes 页数：96 Pages

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Dual 14-bit DAC, up to 125 Msps

文件：457.59 Kbytes 页数：25 Pages

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