D6417760BL200ADV中文资料32-bit Microcontrollers数据手册Renesas规格书

描述 Description

The SH7760 is a microcomputer featuring an LCD controller, USB host, and other peripheral functions. & It includes the SH-4 CPU, which at the object code level is upwardly compatible with the SH-1, SH-2, and SH-3 microcomputers. It has an instruction cache, an operand cache that can be switched between copy-back and write-through modes, a 4-entry full-associative instruction TLB (translation look aside buffer), and MMU (memory management unit) with 64- entry full-associative shared TLB. The sizes of the instruction cache and operand cache are 16 kbytes and 32 kbytes. & The SH7760 also includes the bus state controller (BSC) that can connect to synchronous DRAM. Also, because of its on-chip functions, such as an LCD controller, a USB host, timers, and serial communication functions, required for multimedia and OA equipment, the SH7760 enables a dramatic reduction in system costs.

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