CYW15G0101DXB集成电路（IC）的电信规格书PDF中文资料

CYW15G0101DXB属于集成电路（IC）的电信。由赛普拉斯半导体公司制造生产的CYW15G0101DXB电信电信接口集成电路 (IC) 为通信网络接口提供特定功能和控制，例如以太网切换、线路驱动器、ISDN、放大器、通道扩展器、数字锁相环、DTMF、音频发生器和解码器、回声消除、检测器和发生器、DDA、电话线路监控器和主叫号码标识。

Functional Description

The CYP15G0101DXB[1] single-channel HOTLink II™ transceiver is a point-to-point communications building block allowing the transfer of data over a high-speed serial link (optical fiber, balanced, and unbalanced copper transmission lines) at signaling speeds ranging from 195 to 1500 MBaud.

特性 Features

■ Second-generation HOTLink® technology

■ Compliant to multiple standards

❐ ESCON®, DVB-ASI, fibre channel and gigabit ethernet (IEEE802.3z)

❐ CPRI™ compliant

❐ CYV15G0101DXB compliant to SMPTE 259M and SMPTE 292M

❐ 8B/10B encoded or 10-bit unencoded data

■ Single-channel transceiver operates from 195 to 1500 MBaud serial data rate

■ Selectable parity check/generate

■ Selectable input clocking options

■ Selectable output clocking options

■ MultiFrame™ Receive Framer

❐ Bit and byte alignment

❐ Comma or full K28.5 detect

❐ Single- or multi-byte framer for byte alignment

❐ Low-latency option

■ Synchronous LVTTL parallel input and parallel output interface

■ Internal phase-locked loops (PLLs) with no external PLL components

■ Dual differential PECL-compatible serial inputs

❐ Internal DC-restoration

■ Dual differential PECL-compatible serial outputs

❐ Source matched for driving 50Ω transmission lines

❐ No external bias resistors required

❐ Signaling-rate controlled edge-rates

■ Optional elasticity buffer in receive path

■ Optional phase align buffer in transmit path

■ Compatible with

❐ Fiber-optic modules

❐ Copper cables

❐ Circuit board traces

■ JTAG boundary scan

■ Built-in self-test (BIST) for at-speed link testing

■ Per-channel link quality indicator

❐ Analog signal detect

❐ Digital signal detect

■ Low power 1.25 W at 3.3 V typical

■ Single 3.3 V supply

■ 100-ball BGA

■ Pb-free package option available

■ 0.25 µ BiCMOS technology