CY8C4024PVS-S412中文资料英飞凌数据手册PDF规格书

General description

PSoC™ 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system

controllers with an Arm® Cortex®-M0+ CPU while being AEC-Q100 compliant. It combines programmable and

reconfigurable analog and digital blocks with flexible automatic routing. The PSoC™ 4000S product family is a

member of the PSoC™ 4 platform architecture. It is a combination of a microcontroller with standard communication and timing peripherals, a capacitive touch-sensing system (CAPSENSE™) with best-in-class performance,

programmable general-purpose continuous-time and switched-capacitor analog blocks, and programmable

connectivity. PSoC™ 4000S products will be upward compatible with members of the PSoC™ 4 platform for new

applications and design needs.

Features

• Automotive Electronics Council (AEC) AEC-Q100 qualified

• 32-bit MCU subsystem

- 48-MHz Arm® Cortex®-M0+ CPU

- Up to 32 KB of flash with read accelerator

- Up to 4 KB of SRAM

• Programmable analog

- Single-slope 10-bit ADC function provided by capacitance sensing block (All the GPIO pins support ADC

function)

- Two current DACs (IDACs) for general-purpose or capacitive sensing applications on any pin

- Two low-power comparators that operate in Deep Sleep low-power mode

• Programmable digital

- Programmable logic blocks allowing Boolean operations to be performed on port inputs and outputs

• Low-power 1.71 V to 5.5 V operation

- Deep Sleep mode with operational analog and 2.5 µA digital system current

• Capacitive sensing

- Capacitive sigma-delta (CSD) provides best-in-class signal-to-noise ratio (SNR) (>5:1) and water tolerance

- Infineon-supplied software component makes capacitive sensing design easy

- Automatic hardware tuning (smart sensing algorithm)

• Serial communication

- Two independent run-time reconfigurable serial communication blocks (SCBs) with re-configurable I2C, SPI,

or UART functionality

• LCD drive capability

- LCD segment drive capability on all GPIOs

• Timing and pulse-width modulation

- Five 16-bit timer/counter/pulse-width modulator (TCPWM) blocks

- Center-aligned, Edge, and pseudo-random modes

- Comparator-based triggering of Kill signals for motor drive and other high-reliability digital logic applications

• Up to 34 programmable GPIO pins

- 24-pin QFN, 28-pin SSOP and 40 QFN

- Any GPIO pin can be CAPSENSE™, analog, or digital

- Drive modes, strengths, and slew rates are programmable