CY7C4291V-15JI中文资料赛普拉斯数据手册PDF规格书

Functional Description

The CY7C4261/71/81/91V are high-speed, low-power FIFO memories with clocked read and write interfaces. All are nine bits wide. The CY7C4261/71/81/91V are pin-compatible to the CY7C42x1V Synchronous FIFO family.

特性 Features

• 3.3V operation for low power consumption and easy

integration into low-voltage systems

• High-speed, low-power, first-in first-out (FIFO)

memories

• 16K × 9 (CY7C4261V)

• 32K × 9 (CY7C4271V)

• 64K × 9 (CY7C4281V)

• 128K × 9 (CY7C4291V)

• 0.35-micron CMOS for optimum speed/power

• High-speed 100-MHz operation (10-ns read/write cycle

times)

• Low power

— ICC = 25 mA

— ISB = 4 mA

• Fully asynchronous and simultaneous read and write

operation

• Empty, Full, and programmable Almost Empty and

Almost Full status flags

• Output Enable (OE) pin

• Independent read and write enable pins

• Supports free-running 50 duty cycle clock inputs

• Width- Expansion capability

• Pin-compatible 3.3V solutions for CY7C4261/71/81/91

• Pin-compatible density upgrade to CY7C42X1V family

• Pb-Free Packages Available