72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

Functional Description[1] The CY7C1480V33/CY7C1482V33/CY7C1486V33 SRAM integrates 2M x 36/4M x 18/1M × 72 SRAM cells with advanced synchronous peripheral circuitry and a two-bit counter for internal burst operation. All synchronous inputs are gated by registers controlled by a positive-edge-trigg

文件：398.86 Kbytes 页数：30 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

文件：578.57 Kbytes 页数：31 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

文件：1.29368 Mbytes 页数：32 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

文件：1.29368 Mbytes 页数：32 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM

文件：578.57 Kbytes 页数：31 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司