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CY7C1360C-166AXI

9-Mbit(256K횞36/512K횞18)PipelinedSRAM

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166AXI

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

FunctionalDescription TheCY7C1360C/CY7C1362CSRAMintegrates262,144x36and524,288x18SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClock

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166AXI

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166BGC

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166BGC

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

FunctionalDescription TheCY7C1360C/CY7C1362CSRAMintegrates262,144x36and524,288x18SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClock

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166BGI

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

FunctionalDescription TheCY7C1360C/CY7C1362CSRAMintegrates262,144x36and524,288x18SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClock

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166BGI

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166BGXC

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166BGXC

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

FunctionalDescription TheCY7C1360C/CY7C1362CSRAMintegrates262,144x36and524,288x18SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClock

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

CY7C1360C-166BGXI

9-Mbit(256Kx36/512Kx18)PipelinedSRAM

FunctionalDescription TheCY7C1360C/CY7C1362CSRAMintegrates262,144x36and524,288x18SRAMcellswithadvancedsynchronousperipheralcircuitryandatwo-bitcounterforinternalburstoperation.Allsynchronousinputsaregatedbyregisterscontrolledbyapositive-edge-triggeredClock

CypressCypressSemiconductor

赛普拉斯赛普拉斯半导体公司

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