4-Mbit (256K x 18) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1353G is a 3.3V, 256K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1353G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件：229.5 Kbytes 页数：13 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Flow-through SRAM with NoBL??Architecture

文件：575.66 Kbytes 页数：13 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Flow-through SRAM with NoBL??Architecture

Functional Description[1] The CY7C1353G is a 3.3V, 256K x 18 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1353G is equipped with the advanced No Bus Latency™ (NoBL™) logic requi

文件：229.5 Kbytes 页数：13 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

4-Mbit (256K x 18) Flow-through SRAM with NoBL??Architecture

文件：575.66 Kbytes 页数：13 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司