128K x 32 Synchronous Pipelined Cache RAM

Functional Description The CY7C1339B is a 3.3V, 128K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. The CY7C1339B I/O pins can operate at either the 2.5V or the 3.3V level; the I/O pins are 3.3V-tolerant when VDDQ = 2.5V. All

文件：529.15 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K x 32 Synchronous Pipelined Cache RAM

Functional Description The CY7C1339B is a 3.3V, 128K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. The CY7C1339B I/O pins can operate at either the 2.5V or the 3.3V level; the I/O pins are 3.3V-tolerant when VDDQ = 2.5V. All

文件：529.15 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K x 32 Synchronous Pipelined Cache RAM

Functional Description The CY7C1339B is a 3.3V, 128K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. The CY7C1339B I/O pins can operate at either the 2.5V or the 3.3V level; the I/O pins are 3.3V-tolerant when VDDQ = 2.5V. All

文件：529.15 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

128K x 32 Synchronous Pipelined Cache RAM

Functional Description The CY7C1339B is a 3.3V, 128K by 32 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. The CY7C1339B I/O pins can operate at either the 2.5V or the 3.3V level; the I/O pins are 3.3V-tolerant when VDDQ = 2.5V. All

文件：529.15 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司