256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

文件：596.86 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

文件：596.86 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

文件：596.86 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

256K x 18 Synchronous-Pipelined Cache RAM

Functional Description The CY7C1327B is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. Features • Supports 100-MHz bus for Pentium® and PowerPC™ operations with zero wait states • Fully registered inputs and outp

文件：596.86 Kbytes 页数：17 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司