1-Mbit (64K x 18) Flow-Through Sync SRAM

Functional Description[1] The CY7C1297F is a 131,072 x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increm

文件：439.96 Kbytes 页数：15 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1-Mbit (64K x 18) Flow-Through Sync SRAM

Functional Description[1] The CY7C1297F is a 131,072 x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increm

文件：439.96 Kbytes 页数：15 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司

1-Mbit (64K x 18) Flow-Through Sync SRAM

Infineon

英飞凌

1-Mbit (64K x 18) Flow-Through Sync SRAM

Functional Description[1] The CY7C1297H is a 64K x 18 synchronous cache RAM designed to interface with high-speed microprocessors with minimum glue logic. Maximum access delay from clock rise is 6.5 ns (133-MHz version). A 2-bit on-chip counter captures the first address in a burst and increments

文件：354.47 Kbytes 页数：15 Pages

CypressCypress Semiconductor

赛普拉斯赛普拉斯半导体公司