CY74FCT573ATSOC集成电路（IC）的锁存器规格书PDF中文资料

CY74FCT573ATSOC属于集成电路（IC）的锁存器。由美国德州仪器公司制造生产的CY74FCT573ATSOC锁存器锁存器是类似于触发器的基本数字存储设备，但是不同之处在于，在锁存使能（或类似命名）信号处于有效逻辑状态的任何时间，保持的逻辑状态都可以改变。“透明”锁存器还允许设备输出在锁存使能信号有效时反映输入的当前状态，而相反的是，状态仅在保持状态已固定时改变。

Function and Pinout Compatible With FCT

and F Logic

Reduced VOH (Typically = 3.3 V) Versions

of Equivalent FCT Functions

Edge-Rate Control Circuitry for

Significantly Improved Noise

Characteristics

Ioff Supports Partial-Power-Down Mode

Operation

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Matched Rise and Fall Times

Fully Compatible With TTL Input and

Output Logic Levels

3-State Outputs

CY54FCT573T

– 32-mA Output Sink Current

– 12-mA Output Source Current

CY74FCT573T

– 64-mA Output Sink Current

– 32-mA Output Source Current

description

The ’FCT573T devices consist of eight latches with 3-state outputs for bus-organized applications. When the

latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup

times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE)

input is low. When OE is high, the bus output is in the high-impedance state. In this mode, data can be entered

into the latches. The ’FCT573T devices are identical to the ’FCT373T devices, except for the flow-through

pinout of the ’FCT573T, which simplifies board design.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the

outputs, preventing damaging current backflow through the device when it is powered down.